1. Field of the Invention
This invention generally relates to semiconductor wafer processing systems, and more particularly to methods and associated apparatus for scheduling the processing of semiconductor wafers.
2. Description of the Background Art
Semiconductor devices are fabricated using specialized wafer processing systems, which typically have several modules for performing various operations on a wafer. FIG. 1A shows a schematic diagram of an exemplary wafer processing system 100 in the prior art. System 100 has several modules including modules 101-106. A robot 107, which is part of a transfer module not specifically shown, is used to move wafers from one module to another. System 100 further includes a computer 111 and a data acquisition and control system 112 for controlling various control elements 113 (e.g., valves, relays, robots, gates, sensors, heaters, motors, etc.) utilized in the modules of system 100.
An example wafer processing run is now described. A wafer cassette containing several wafers is loaded in a cassette station module 101. Robot 107 picks up a wafer from the wafer cassette and moves the wafer into aligner module 103. In aligner 103, the physical orientation of the wafer is properly adjusted prior to the wafer's subsequent movement to other modules. The wafer is then transferred to a bake module 104, where the wafer is pre-heated prior to being placed in a CVD process module 105 (or CVD process module 106). In CVD process module 105, a film of processing material is deposited on the wafer. System 100 can also accommodate other types of process modules including physical vapor deposition, etching, evaporation, and electro-deposition modules to name a few. Because newly processed wafers can reach temperatures that are high enough to melt a wafer cassette, the wafer coming out of CVD process module 105 is first cooled in a cooling station module 102 before being returned to its wafer cassette in cassette station 101. The just described processing run is repeated for all wafers in cassette station 101.
The movement and processing of each wafer in system 100 are performed in accordance with a list of instructions, commonly known as a recipe, running on computer 111. FIG. 1B shows a recipe 108 for a first wafer, a recipe 109 for a second wafer, and a recipe 110 for a third wafer. In accordance with recipe 108, the first wafer is aligned in aligner 103 (see FIG. 1A), pre-heated in bake module 104, processed in CVD process module 105, and cooled in cooling station 102. The recipe for the second wafer, recipe 109, is similar to recipe 108 except that the second wafer is processed in CVD process module 106 instead of CVD process module 105. Recipe 110 is also similar to recipe 108 except that the third wafer is processed in either CVD process module 105 or CVD process module 106 after going through bake module 104.
A “scheduler” coordinates the running of recipes in a wafer processing system. A typical scheduler allows only one recipe to run at any given time. For example, while wafers which use recipe 108 are being processed, wafers which use other recipes will not be scheduled for processing until the completion of recipe 108. To increase the throughput of the wafer processing system, it is desirable to have a scheduler with the capability to schedule multiple, compatible recipes to run at the same time. Advantageously, such a scheduler should also be extensible and easy to maintain.